1. Field of the Invention
The present invention generally relates to a structural application-specific integrated circuit (ASIC), in particular, to a power supply architecture applied to a structural ASIC.
2. Description of Related Art
A common ASIC does not have a fixed structure, and a mask of each layer can be randomly designed, but the structural ASIC is different. FIG. 1 shows a partial structure of a conventional structural ASIC 100. A metal oxide semiconductor field effect (MOS) transistor exists at lower part of FIG. 1, which includes a P-type substrate 105, N-wells 103 and 104, and an insulating layer 102 of a gate. At the upper part, three metal layers 121-123 are connected to the MOS transistor through a contact 111.
The structural ASIC features in that some layers are fixed and cannot be changed, and other layers can be designed or altered by the user. For example, in the structural ASIC 100, all the layers under the metal layer 123 is fixed, and the layers above the metal layer 123 and all the layers of the metal layer 123 can be freely designed. In the structural ASIC, the layers which can be freely designed are referred to as programmable layers, and the layers which cannot be altered are referred to as non-programmable layers.
The user can design the product by using the non-programmable part as the basis, so as to save a part of the cost. Particularly, the mask of the bottommost layer is usually the most complicated and expensive. Under a desired status, a complete circuit can be obtained through adding several masks by the user. The structural ASIC 100 of FIG. 1 is set as an example, the bottommost layer can be the MOS transistor, and then the metal layers 121 and 122 are connected to the MOS transistor, so as to form the cells which are non-programmable. Then, the user may connect the cells with the programmable metal layers above 123, so as to form the required functions. Recently, a metal programmable cell array (MPCA) available on the market is similarly a structural ASIC.
All the circuits require a power supply line and a ground line, and in a conventional structural ASIC, no matter the programmable or the non-programmable metal layer adopts the design as shown in FIG. 2. FIG. 2 shows atypical cell 201 and a power supply line 202 and a ground line 203 therein. The power supply line 202 and the ground line 203 are shared by a plurality of cells, so the power supply line 202 and the ground line 203 pass through many cells by adopting a passing-through design. The problem is that the passing-through power supply line and ground line occupy much precious area, particularly on the programmable layers. In order to save the mask cost, the user naturally hopes that the programmable layers are the less the better. In order to achieve the objective, it is necessary to simplify the routing of the programmable layers, and it is a method to reduce the total area of the wire. Under this requirement, the passing-through power supply line and ground line are obstacles of the routing simplification.